Vendor: nSilition Category: High-Speed

TSMC 40G 2Gb/s TX LVDS IO cell

The LST25R/Z cell is a high-speed and low-power LVDS transmitter IO cell powered at 2.5V/0.9V or 1.8V/0.9V, designed on the TSMC …

TSMC 40nm G Silicon Proven View all specifications

Overview

The LST25R/Z cell is a high-speed and low-power LVDS transmitter IO cell powered at 2.5V/0.9V or 1.8V/0.9V, designed on the TSMC 40 G technology.

Key features

  • TSMC 40 G
  • 2.5V/0.9V IO/Core transistors
  • Standard-compliant to TIA/EIA-644-A-2001
  • Built-in, low parasitic ESD protection
  • Easily integrates with TSMC I/O library cells
  • All-in-ringR topology, so no core silicon area is used by LVDS
  • The same cells operate with 2.5V/0.9V or 1.8V/0.9V power supplies
  • Adjustable output common mode voltage (LVDS or SubLVDS mode)
  • Adjustable driving current for buses with single or double termination
  • Standby/power down mode
  • Internal bias voltage generation and bias current distribution circuitry
  • Selectable on-chip termination resistor, with optional user tuning
  • Digital loopback functions to ease ATE testing
  • Up to 2 Gbps data rate

Applications

  • Multi-purpose reconfigurable IO
  • Point-to-point, point-to-multipoint or bus-based IC high-speed data communications
  • Intra-package (e.g. MCM or SIP) inter-die high-speed data communications
  • Backplane high-speed data communications
  • High-speed serial communications (HDMI, SATA, PCIeX, etc.)
  • Communication to LCD/OLED screens
  • Video sensor digital data interface

What’s Included?

  • GDS II layouts
  • LEF abstracts
  • CDL netlists
  • Liberty timings
  • Verilog description
  • A full datasheet
  • An integration note

Silicon Options

Foundry Node Process Maturity
TSMC 40nm G Silicon Proven

Specifications

Identity

Part Number
nSIO2000_TS40G 2V5_0V9_TX
Vendor
nSilition
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

nSilition
HQ: Belgium
nSilition specializes in the development of industrial quality, very high performances, low power, up to 16b A/D and D/A converters. They are available as ready-to-use semiconductor hard macros for the most popular silicon technologies. Our “IP design service” offers top quality customization and support dedicated to your needs and your specifications. The engineering team of nSilition contributes every day to the research and the development of our specific data converters design tools and our proprietary architecture enhancements. All these elements have been proven and characterized through different silicon prototyping projects. nSilition is a 100% privately held company, duly registered under the laws of Belgium, Europe. It has been founded in 2006 by two Analog and Mixed-Signal ASIC design experts, totalizing more than 20 years of industrial IC and data converters design experience.

Learn more about High-Speed IP core

PCIe 5.0: The universal high-speed interconnect for High Bandwidth and Low Latency Applications Design Challenges & Solutions

Innosilicon, a leading IP provider, offers a complete PCIe 5.0 solution stack that includes both PHY and controller IPs. Although both layers are crucial to achieving a fully compliant and high-performance PCIe interface, this paper deep dives into the technical challenges of PHY design, highlighting insights drawn from real-world design margins, receiver robustness, and advanced jitter analysis in the context of Gen5 systems.

Frequently asked questions about High-Speed I/O Pad IP

What is TSMC 40G 2Gb/s TX LVDS IO cell?

TSMC 40G 2Gb/s TX LVDS IO cell is a High-Speed IP core from nSilition listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.

How should engineers evaluate this High-Speed?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this High-Speed IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP