Vendor: Atomic Rules LLC Category: Timers & Watchdogs

Sub-Nanosecond Resolution, Sub-Microsecond Accurate, FPGA System Timer Component

Atomic Rules TimeServo is a RTL IP core that serves the function of an FPGA’s System Timer or Clock.

Overview

Atomic Rules TimeServo is a RTL IP core that serves the function of an FPGA’s System Timer or Clock. Although specifically designed to support the needs of line-rate independent packet timestamping, TimeServo may find use where there is the need for a high-resolution, modest-accuracy timebase. TimeServo’s PI-DPLL allows a local TCXO to be disciplined by an external 1 PPS signal to achieve excellent syntonicity. In conjunction with timestamp-capable MACs (not included) and host-control software (as-is examples provided), TimeServo is a vital and central component of an IEEE-1588/PTP system.

Key features

Flexible and independent clocks for control-plane and reference clock
Up to 32 outputs, each in their own clock domain
Outputs individually runtime switchable between three 80-bit formats (Binary 48.32, IEEE Ordinary, IEEE Transparent)
Software control and observability from AXI control plane
Internal logical 120-bit resolution phase accumulator
Proportional/Integral controlled Digital Phase Locked Loop (PI-DPLL)
Observable output of digital Phase-Frequency Detector (PFD Monitor)

Block Diagram

TimeServo - System Timer IP Core for FPGA block diagram

Benefits

Single-component solution for providing coherent time within an FPGA
Operates with or without an externally provided Pulse-Per-Second (PPS) Reference
Sub-Nanosecond Resolution, Sub-Microsecond Accurate, FPGA System Timer Component

What’s Included?

“As is” software control utility to set/get common settings as well as observe behavior.
“As is” example design using Atomic Rules Arkville (Arkville NOT included) showing application with IEEE-1588 Precision Time Protocol (PTP). (To be included in 17.11 release.)

Specifications

Identity

Part Number

TimeServo - System Timer IP Core for FPGA

Vendor

Atomic Rules LLC

Type

Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Atomic Rules LLC

HQ: USA

We provide our clients with effective solutions to problems involving interconnection networks and reconfigurable computing. Our practice employs scalable, rule-based methods to tackle complex concurrency among heterogeneous processors. Advances in chip technology and throughput of low cost computing platforms offer significant opportunities to radically improve performance of current products. Atomic Rules understands the limitations of composing complex processor interactions using conventional RTL methods. To address this challenge, we use tools and techniques inspired by functional programming. Beyond RTLs, we specialize in creating source codes written in Bluespec SystemVerilog, a vehicle for code correctness, portability and reuse. Atomic Rules provides its clients with expert SoC/FPGA competencies that build upon RTL/ESL design and verification techniques; not reinvent them.

Contact Atomic Rules LLC

Frequently asked questions about Timers & Watchdogs IP cores

What is Sub-Nanosecond Resolution, Sub-Microsecond Accurate, FPGA System Timer Component?

Sub-Nanosecond Resolution, Sub-Microsecond Accurate, FPGA System Timer Component is a Timers & Watchdogs IP core from Atomic Rules LLC listed on Semi IP Hub.

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