Vendor: SmartDV Technologies Category: sFPDP

Serial Front Panel Data Port (SFPDP) Verification IP

Serial Front Panel Data Port (SFPDP) is a high-speed low-latency data-streaming serial communications protocol for use in high-sp…

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Verification IP View all specifications

Overview

Serial Front Panel Data Port (SFPDP) is a high-speed low-latency data-streaming serial communications protocol for use in high-speed real-time data transfer applications. Serial Front Panel Data Port (SFPDP) is fully compliant with standard Serial Front Panel Data Port (SFPDP) specification (AV17DOT1) and provides the following features.

Serial Front Panel Data Port (SFPDP) Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

Serial Front Panel Data Port (SFPDP) Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key features

  • Compliant with Serial Front Panel Data Port (SFPDP) Specification AV17DOT1 standard.
  • Complete Serial Front Panel Data Port (SFPDP) TX/RX functionality.
  • Supports following interfaces
    • 1 bit (serial) and 8,10 bit (parallel)
    • 8B/10B Encoder/Decoder interface
    • 32 bit Dword Primitive interface
    • Complete Frame transaction level interface
  • Supports link speeds upto 10.0Gbaud with speed negotiation.
  • Supports different data rates.
  • Supports all the three fiber frame types
    • Normal data fiber frame
    • Sync without data fiber frame
    • Sync with data fiber frame
  • Supports the following types of error insertion and detection
    • Invalid frame fields
    • Invalid EOF and SOF
    • Oversize and undersize frames
    • Disparity errors
    • Invalid K and D character error
    • Invalid command error
    • CRC error
  • Monitors, detects and notifies the testbench of significant events such as transactions, warnings, timing and protocol violations.
  • Supports constraints Randomization.
  • Status counters for various events on bus.
  • Callbacks in Transmitter, Receiver and Monitor for user processing of data.
  • Serial Front Panel Data Port (SFPDP) Verification IP comes with complete testsuite to test every feature of Serial Front Panel Data Port (SFPDP) specification.
  • Functional coverage for complete Serial Front Panel Data Port (SFPDP) features.

Block Diagram

Serial Front Panel Data Port (SFPDP) VIP block diagram

Benefits

  • Faster testbench development and more complete verification of Serial Front Panel Data Port (SFPDP) designs.
  • Easy to use command interface simplifies testbench control and configuration of Initiator and Target.
  • Simplifies results analysis.
  • Runs in every major simulation environment.

What’s Included?

  • Complete regression suite containing all the Serial Front Panel Data Port (SFPDP) testcases.
  • Examples showing how to connect various components, and usage of Tx, Rx and Monitor.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation contains User's Guide and Release notes.

Specifications

Identity

Part Number
Serial Front Panel Data Port (SFPDP) VIP
Vendor
SmartDV Technologies
Type
Verification IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
Contact SmartDV Technologies

Learn more about sFPDP IP core

IP Gate Count Estimation Methodology during Micro-Architecture Phase

This paper presents challenges of gate count estimation during early architecture design phase along with effective methodology. This paper is backed up with vast experience of various IP designs with logic area up-to several hundreds of kilo gates with several hundred kilo bits of memory.

Frequently asked questions about SFPDP IP cores

What is Serial Front Panel Data Port (SFPDP) Verification IP?

Serial Front Panel Data Port (SFPDP) Verification IP is a sFPDP IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this sFPDP?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this sFPDP IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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