Vendor: Allegro DVT Category: Video Processing

Legacy formats decoder up to 1920X1080@60FPS

The AL-D105 is a multi-format, multi-stream, video decoder IP core, capable of decoding 12 different video formats up to H.264/AV…

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Overview

The AL-D105 is a multi-format, multi-stream, video decoder IP core, capable of decoding 12 different video formats up to H.264/AVC 1920x1080i@60fps. The AL-D105 has been silicon proven in mutiple STB and DTV chipsets.

Supported formats

  • H.264/AVC CBP/ MP/HP up to 1920x1080i@60fps
  • H.264/MVC up to 1920x1080p@30fps each eye
  • MPEG-4.2 SP/ASP
  • MPEG-2 MP/HL
  • VC-1/WM9 SP/MP/AP
  • MP4 (DivX 3.11, H.263, Sorenson Spark)
  • AVS, AVS+
  • Real Media RV8/RV9/RV10
  • Google VP6 / VP8
  • JPEG / MJPEG Baseline up to 150 MPxl/s

Interfaces

  • AMBA APB interface for control registers programming
  • AMBA AXI interfaces for data access

Key features

  • Multi-stream and Multi-format
  • Mature IP silicon proven in multiple mass production STB and DTV SoCs down to 28nmPES or ES stream input High latency tolerance (CPU & Memory)
  • Low CPU load
  • Low Memory Bandwidth Robust Error Resilience controlled by control software
  • Production verified control software
  • Extensively verified with a large library of third party test streams

What’s Included?

  • RTL source code
  • C control software
  • Bit accurate executable software reference model
  • Documentation

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
D105
Vendor
Allegro DVT
Type
Silicon IP

Provider

Allegro DVT
HQ: France
Allegro DVT, headquartered in Grenoble, France, is a world leading company offering digital video processing solutions including compliance streams and video codec semiconductor IPs focused on the H.264, HEVC, AVS2/3, VP9, AV1, VVC and LCEVC standards. Founded in 2003, Allegro is today a recognized market leader in video compression technologies and has been chosen by more than 100 major IC providers, OEMs and broadcasters.
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Learn more about Video Processing IP core

Picking the right MPSoC-based video architecture: Part 1

A look at the design of multiprocessor systems-on-chips (MPSoCs) for video applications and how to optimize them for computational power and real-time performance as well as flexibility. Part 1: Architectural approaches to video processing

Analysis: ARC's Configurable Video Subsystems

Adding to its growing portfolio of licensable silicon IP subsystems, ARC has announced five configurable video processing subsystems. The subsystems range from the smallest-size AV 402V to the highest-performance AV 417V, and support multi-standard video encoding and decoding at resolutions ranging from CIF to D1.

Frequently asked questions about Video Processing IP

What is Legacy formats decoder up to 1920X1080@60FPS?

Legacy formats decoder up to 1920X1080@60FPS is a Video Processing IP core from Allegro DVT listed on Semi IP Hub.

How should engineers evaluate this Video Processing?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Video Processing IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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