Vendor: WASIELA Category: Channel Coding

HomePlug Turbo Decoder

On the transmitter side, the PHY layer receives its inputs from the Media Access Control (MAC) layer.

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Overview

On the transmitter side, the PHY layer receives its inputs from the Media Access Control (MAC) layer. There are three separate processing chains: A) HomePlug 1.0.1 Frame Control (FC) data, B) HomePlug AV2 Frame Control data, and C) HomePlug AV2 Payload data. This IP implements the HomePlug AV2 payload data stream.The design includes a CRC, a Scrambler, a Turbo Convolutional Encoder, and an Interleaver.

On the receiver side, The AV2 Payload Data Decoder consists of a Channel De-interleaver followed by a Turbo Convolutional Decoder, a De-scrambler and a CRC removalunit to recover the AV2 Payload data.

Key features

  • Supports rates½ and 16/18 coded input.
  • FEC block size support : 16, 72, 136, 264, 520 bytes
  • Configurable number of Iterations
  • LLR width 14 bits
  • Max-Log Map algorithm.VK-3052
  • Compliant with HomePlug AV Specification Version 2.1
  • Cyclic Redundancy check (CRC)
  • Channel Interleaving / DeInterleaving
  • Bypassing mode for Scrambler/De-Scrambler
  • Bypassing mode for Channel Interleaver/DeInterleaver
  • Puncture/De-Puncture units
  • Turbo Encoder design

Applications

  • Home Plug

What’s Included?

  • Synthesizable Verilog
  • System Model (Matlab) and documentation
  • Verilog Test Benches
  • Documentation

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
HomePlug Turbo Decoder
Vendor
WASIELA

Provider

WASIELA
HQ: Egypt
Wasiela specializes in IP cores for Digital Media Soutions, and Physical Layer Design. Additionally, we offer Digital Design services for ASIC and FPGA implementation of communications receivers for consumer electronics, including OFDM systems. Wasiela Semiconductors supplies PHY layer designs to chip manufacturers,with the goal of giving our customers the lead in the market through our efficient and highly performing algorithms.
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Frequently asked questions about Channel Coding IP cores

What is HomePlug Turbo Decoder?

HomePlug Turbo Decoder is a Channel Coding IP core from WASIELA listed on Semi IP Hub.

How should engineers evaluate this Channel Coding?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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