Vendor: SmartDV Technologies Category: GPIO

GCI Synthesizable Transactor

The GCI Synthesizable Transactor is compliant with V1.0 specifications and verifies GCI interfaces.

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Overview

The GCI Synthesizable Transactor is compliant with V1.0 specifications and verifies GCI interfaces. GCI is build on top of it to make it robust. GCI Synthesizable Transactor provides a smart way to verify the GCI component of a SOC or a ASIC in Emulator or FPGA platform. GCI Synthesizable Transactor is developed by experts in networking, who have developed networking products in companies like Intel, Cortina-Systems, Emulex, Cisco. We know what it takes to verify a networking product.

Key features

  • Compliant to GCI protocol specification v1.0
  • Supports fixed-sized frames
  • Supports configurable number of serial lanes as per the specification
  • Supports 10 bit per lane serdes interface
  • Supports training sequence as per spec
  • Reset the data link layer
  • Supports configurable Tx and Rx long term CRC function per lane
  • Supports CID and Idle/Pause frames
  • Supports Scrambler as per spec
  • Supports lane reordering as per spec
  • Supports breaking of frames into sub-frames
  • Supports replay and error recovery
  • Supports polarity inversion
  • Supports Per lane skew insertion to test lane alignment
  • Supports Addressable registers
  • Supports very flexible way to test sync and alignment for state machines at startup
  • Recovers clock from input serial data stream
  • Supports all types of error insertion and detection
    • CRC errors
    • Pause frame errors
    • Bad scrambler state
    • Lane alignment failure
    • Disparity errors
    • Invalid code group insertion
    • Invalid /K/ characters insertion
    • Lane Skew insertion

Block Diagram

GCI Transactor block diagram

Benefits

  • Compatible with testbench writing using SmartDV's VIP
  • All UVM sequences/testcases written with VIP can be reused
  • Runs in every major emulators environment
  • Runs in custom FPGA platforms

What’s Included?

  • Synthesizable transactors
  • Complete regression suite containing all the GCI testcases
  • Examples showing how to connect various components, and usage of Synthesizable Transactor
  • Detailed documentation of all DPI, class, task and functions used in verification env
  • Documentation contains User's Guide and Release notes

Specifications

Identity

Part Number
GCI Transactor
Vendor
SmartDV Technologies
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
Contact SmartDV Technologies

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Frequently asked questions about GPIO IP cores

What is GCI Synthesizable Transactor?

GCI Synthesizable Transactor is a GPIO IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this GPIO?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GPIO IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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