UMC 40nm Low Power Process , Two Port Register File with dual power rail
UMC 40nm Low Power Process , Two Port Register File with dual power rail
- UMC
- 40nm
Register File IP cores provide reusable on-chip storage structures for processors, controllers, and accelerators in modern SoC and ASIC designs.
These IP cores support small, high-speed storage structures used in processors, DSPs, and accelerators, helping designers balance density, speed, power, and reliability in memory-centric subsystems
This catalog allows you to compare Register File IP cores from leading vendors based on density, performance, power efficiency, and process node compatibility.
Whether you are designing CPU cores, DSP engines, AI accelerators, or custom datapaths, you can find the right Register File IP for your application.
UMC 40nm Low Power Process , Two Port Register File with dual power rail
UMC 40nm Low Power Process , Two Port Register File with dual power rail
UMC 90nm Standard Performance LowK Logic Process Synchronous high density single port register file SRAM memory compiler
UMC 40nm embedded high voltage (eHV) low power Process standard synchronous high density single port register file SRAM memory co…
UMC 40nm low power process standard synchronous one port register file SRAM memory compiler with LVT peripheral.
UMC 40nm low power process standard synchronous one port register file SRAM memory compiler with HVT peripheral.
UMC 40nm Low Power Process One Port Register File with 213 cell
UMC 40nm Low Power Process One Port Register File with 213 cell
UMC 40nm LP Logic Process one-port register file for area optimize with LVT peripheral
UMC 40nm LP Logic Process one-port register file for area optimize with LVT peripheral
UMC 40nm LP Logic Process one-port register file for area optimize with HVT peripheral
UMC 40nm LP Logic Process one-port register file for area optimize with HVT peripheral
UMC 40nm Low Power Process One Port Register File wit 213 cell
UMC 40nm Low Power Process One Port Register File wit 213 cell
UMC 28nm HPM ultra high speed register compiler
UMC 28nm HPM ultra high speed register compiler
UMC 28HPM UHS 1PRF
UMC 28nm HPC Process Ultra High Speed One Port Register File Memory Compiler with periphery LVT
UMC 28nm HPC Process Ultra High Speed One Port Register File Memory Compiler with periphery LVT
UMC 28nm HPC Process Ultra High Speed One Port Register File Memory Compiler
UMC 28nm HPC Process Ultra High Speed One Port Register File Memory Compiler
28nm HPM 1PRF with peri -LVT
UMC 28nm HPC process PG-2PRF with LVT and Bank 2
UMC 28nm HPC process PG-2PRF with LVT and Bank 2
UMC 28nm HPC process 2PRF with LVT and Bank 2
UMC 28nm HPC process 2PRF with LVT and Bank 2
UMC 28nm HPC process PG Two Port Register File with peri-LVT
UMC 28nm HPC process PG Two Port Register File with peri-LVT
UMC 28nm HPC process PG-2PRF with HVT Bank4
UMC 28nm HPC process PG-2PRF with HVT Bank4
UMC 28nm HPC process 2PRF, HVT & Bank2
UMC 28nm HPC process 2PRF, HVT & Bank2
UMC 28nm HPC process PG Two Port Register File with peri-HVT
UMC 28nm HPC process PG Two Port Register File with peri-HVT