Vendor: SmartDV Technologies Category: DDR

DDR4 3DS Memory Model

DDR4 3DS Memory Model provides an smart way to verify the DDR4 3DS component of a SOC or a ASIC.

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Overview

DDR4 3DS Memory Model provides an smart way to verify the DDR4 3DS component of a SOC or a ASIC. The SmartDV's DDR4 3DS memory model is fully compliant with standard DDR4 3DS Specification and provides the following features. Better than Denali Memory Models.

DDR4 3DS Memory Model is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

DDR4 3DS Memory Model comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key features

  • Supports DDR4 3DS memory devices from all leading vendors.
  • Supports 100% of DDR4 3DS protocol standard JESD79-4-1, JESD79-4-1A and JESD79-4-1B.
  • Supports all the DDR4 3DS commands as per the specs.
  • Supports up to 16GB device density.
  • Supports X4 and X8 devices.
  • Supports all speed grades as per specification.
  • Quickly validates the implementation of the DDR4 3DS standard JESD79-4-1, JESD79-4-1A and JESD79-4-1B.
  • Supports On-the-fly protocol and data checking.
  • Supports Programmable Write latency and Read latency.
  • Supports Programmable burst lengths: 4, 8.
  • Supports Programmable Preamble.
  • Supports Read preamble training.
  • Supports the following burst types.
    • Sequential
    • Interleave
  • Supports burst order.
  • Checks for following
    • Check-points include power up, initialization and power off rules
    • State based rules, Active Command rules
    • Read/Write Command rules etc.,
    • All timing violations
  • Supports all mode register programming.
  • Supports Data Mask and Data Bus Inversion (DBI).
  • Supports write leveling for calibrations and ZQ Calibration commands.
  • Supports Fine Granularity Refresh Mode.
  • Supports Multipurpose Register.
  • Supports DQ Vref training.
  • Supports CRC for Write Operations.
  • Supports DLL features.
  • Supports Command Address Parity features.
  • Supports Post Package Repair (PPR).
  • Supports Control Gear down mode and CAL Mode Operation.
  • Supports Per DRAM Addressability.
  • Supports Connectivity Test (CT) mode.
  • Supports both Synchronous and Asynchronous On-Die Termination modes.
  • Supports Power Down features and Maximum Power Saving mode.
  • Supports input clock stop and frequency change.
  • Protocol checker fully compliant with DDR4 3DS Specification JESD79-4-1, JESD79-4-1A and JESD79-4-1B.
  • Constantly monitors DDR4 3DS behavior during simulation.
  • Models, detects and notifies the test bench of significant events such as transactions, warnings, timing and protocol violations.
  • Built in functional coverage analysis.
  • Supports Callbacks, so that user can access the data observed by monitor.

Block Diagram

DDR4 3DS Memory Model block diagram

Benefits

  • Faster testbench development and more complete verification of DDR4 3DS designs.
  • Easy to use command interface simplifies monitor control and configuration.
  • Simplifies results analysis.
  • Runs in every major simulation environment.

What’s Included?

  • Complete regression suite containing all the DDR4 3DS testcases.
  • Examples showing how to connect and usage of Model.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation also contains User's Guide and Release notes.

Specifications

Identity

Part Number
DDR4 3DS Memory Model
Vendor
SmartDV Technologies
Type
Silicon IP
Controller / PHY
Controller

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
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Learn more about DDR IP core

Which DDR SDRAM Memory to Use and When

This whitepaper provides an overview of the JEDEC memory standards to help SoC designers select the right memory solution, including IP, that best fits their application requirements.

Frequently asked questions about DDR Interface IP

What is DDR4 3DS Memory Model?

DDR4 3DS Memory Model is a DDR IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this DDR?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DDR IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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