Provider
Dolphin Technology
HQ:
USA
Dolphin Technology provides SoC designers with a broad array of silicon-proven IP for Memory, I/O, Standard Cells, DDR PHY, Memory Controllers, PLL/DLL and Memory Test and Repair (BIST).
Dolphin offers both standard and custom solutions that are optimized for low power, high performance and high density across a broad range of process technologies. These solutions include:
- Memory Compilers (Single & Dual Port SRAM, 1 & 2 Port RF, ROM)
- Specialty Memory (ROM, BCAM, TCAM, CAM)
- I/O (General purpose, bus-specific, DDR, Flash)
- Standard Cell libraries (7-track, 10-track, 12-track, 14-track)
- DDR PHY (hardened DDRx & LPDDRx SDRAM PHY)
- PLL/DLL (programmable PLL, fully digital DLL)
- SERDES
- Memory Controllers (DDRx & LPDDRx DRAM)
- Memory BIST
- And more...
Dolphin Technology has been enabling SoC design teams to enhance quality and reduce time to market since 1996.
Learn more about DLL IP core
As SoCs evolve to support a growing range of memory interfaces, designers are faced with the challenge of balancing integration complexity, pin efficiency, and performance scalability. Traditionally, implementing both xSPI (JESD251) for boot and eMMC 5.1 for high-speed storage required separate PHYs, leading to increased silicon area, power consumption, and I/O overhead.
Systems using SoCs designed in advanced processes generally rely on external Flash devices that use NOR/NAND Flash memory technology for non-volatile storage. NOR Flash memory offers many benefits for device manufacturers and consumers, such as faster reading, low power consumption, and smaller area. In contrast, NAND Flash memories are ideal for applications such as data storage, where higher memory capacity and faster write and erase operations are required.
In recent years, emerging industries such as AI, Internet of Things, 5G, and intelligent networked vehicles have flourished, and the high requirements for performance have greatly increased the scale and complexity of chips, constantly challenging IP limitations.
In this fifth and last part of Paving the way for the next generation audio codec for True Wireless Stereo (TWS) applications whitepaper, a hastened but safe and improved design flow by Dolphin Design will be discussed.
Despite the fears of the last decade that Moore’s Law had finally reached its end, the microelectronics sector has continued to adapt to new physical constraints and product requirements through sustained innovation and creativity. A major portion of that creative energy has gone into the development of analog, RF and mixed-signal blocks as embeddable IP.