Vendor: Reflex CES Category: Channel Coding

Aurora-like 8b/10b @3Gbps for ALTERA Devices

REFLEX CES introduces the industry’s first release of its Aurora-­‐like IP Core based on ALTERA FPGA enabling interoperability be…

Contact Provider Request Datasheet

Overview

REFLEX CES introduces the industry’s first release of its Aurora-­‐like IP Core based on ALTERA FPGA enabling interoperability between VIRTEX 6 LXT XILINX and STRATIX IV GX and STRATIX V GX ALTERA FPGA.

Key features

  • Up to 3.125Gbps bit rate per lane
  • Configurable up to 16 transceivers lanes
  • 8B/10B encoding
  • Native flow control with immediate and completion mode
  • User flow control
  • Additional modules to convert interfaces to and from AXI streaming
  • Full-­duplex operation
  • Framing interface for user data
  • Clock compensation sequence generation
  • Per lane polarity inversion
  • Skew compensation

Block Diagram

3 Gbps Aurora-like IP Core block diagram

What’s Included?

  • REFLEX CES delivers a cost-­‐effective solution for each customer project based-­‐on an adapted license fee with the following deliveries:
    • VHDL source code or encrypted licenses
    • User guide
    • Reference Design for ALTERA and XILINX development boards.

Specifications

Identity

Part Number
3 Gbps Aurora-like IP Core
Vendor
Reflex CES

Provider

Reflex CES
HQ: France
Fore more than ten years Reflex CES designs and manufactures high-speed boards and rugged systems solutions based-on high-density FPGA that significantly reduce technology risk to customers. The company specializes in Modified-Off-The-Shelf (MOTS) solutions for VPX/OpenVPX, CompactPCI, VME rugged systems, embedded systems, industrial systems, high-speed boards, FPGA boards and PCIe boards. Its expertise spans from chip-level and software-level design up to complete system-level design, manufacturing, and production of small and medium series targeting high-end customers from military/aerospace, defense, telecommunications, medical and industrial sectors.
Contact Reflex CES

Learn more about Channel Coding IP core

Practical Considerations of LDPC Decoder Design in Communications Systems

This paper covers some practical aspects of designing the LDPC decoder starting from comparison between different techniques, different decoders parameters or standards, the effect of those parameters on the LDPC performance, also it discusses the algorithm selection process, and floating point implementation process.

Audio Transport in DisplayPort VIP

DisplayPort uses Secondary Data Packets (SDPs), which are transported over the Main-Link that are not main video stream data. This allows it to carry audio and video simultaneously. The VIP supports audio transmission both in the original mode as defined in the specification as well as just as any other SDP being transmitted.

Frequently asked questions about Channel Coding IP cores

What is Aurora-like 8b/10b @3Gbps for ALTERA Devices?

Aurora-like 8b/10b @3Gbps for ALTERA Devices is a Channel Coding IP core from Reflex CES listed on Semi IP Hub.

How should engineers evaluate this Channel Coding?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP