The QRSM40LP IP is a 3.3V low-power programmable 1.1V LDO implemented in SMICLow-Power 40nm eflash process technology. Its low noise and high-precision makes it especially suitable ASIC and SOC.
40nm eflash 3.3V Programmable 1.1V LDO Regulator with 500mA max. output
Overview
Key Features
- Programmable 0.9V to 1.2V output voltage in 100mV steps
- 2% LDO output variation across process, supply and temperature
- 50uA quiescent current
Benefits
- Low-power and low-noise programmable 1.1V LDO with less than 50uA quiescent current
Applications
- Programmable low-power 1.1V LDO is suitable for embedding in ASIC and SoC subsystems for many applications.
Deliverables
- Behavioural Models
- Timing Models
- GDSII Layout Database
- Netlist for LVS verification
- Usage and Integration Guidelines
- Databook
Technical Specifications
Maturity
SMIC 40nm eflash
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