Vendor: VeriSilicon Microelectronics (Shanghai) Co., Ltd. Category: ADC

Auxiliary ADC - 12-bit Successive Approximation Register (SAR) ADC

This analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution.

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12 Bit GlobalFoundries 28nm SLP Available on request View all specifications

Overview

This analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution.

This ADC has dual input modes, i.e. single-ended and differential-ended. Differential-ended mode is used in noisy environment; whereas single-ended mode is used in clean environment. In single-ended input mode, 12 channels’ input signals can be selected. In differential-ended input mode, 6 pairs’ differential input signals can be selected.

The ADC has dual speed modes – 1Msps or 200Ksps, working in 200K mode could save some power.
 

It is suitable for integrated auxiliary codec applications and multi-converter architectures in wireless or battery-operated products.

Key features

  • Silicon proven in 22, 28, 40, 55, 65, 110, 130, 180nm from SMIC, HHgrace, Global Foundries and Samsung
  • Resolution: 12-bit
  • Data Rate: 1Msps/200Ksps
  • DNL: ±1.5 LSB, INL: ±3 LSB
  • 62dB SNR @FIN=20KHz 1Msps
  • Single-ended or Differential-ended Modes
  • Analog Input Range
    •   VREFH to VREFL, could be rail-to-rail
  • Low Power Consumption
    •   500uA@1MSPS
    •   200uA@200KSPS
  • Flexible Control Logic

Block Diagram

Aux ADC block diagram

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Silicon Options

Foundry Node Process Maturity
GlobalFoundries 28nm SLP Available on request

Specifications

Identity

Part Number
Aux ADC
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP

Analog

Resolution bits
12 Bit

Provider

VeriSilicon Microelectronics (Shanghai) Co., Ltd.
HQ: USA
VeriSilicon Microelectronics (Shanghai) Co., Ltd. (VeriSilicon, 688521.SH) is committed to providing customers with platform-based, all-round, one-stop custom silicon services and semiconductor IP licensing services leveraging its in-house semiconductor IP. Under the unique "Silicon Platform as a Service" (SiPaaS) business model, depending on the comprehensive IP portfolio, VeriSilicon can create silicon products from definition to test and package in a short period of time, and provides high performance and cost-efficient semiconductor alternative products for fabless, IDM, system vendors (OEM/ODM), large internet companies and cloud service provider, etc. VeriSilicon's business covers consumer electronics, automotive electronics, computer and peripheral, industry, data processing, Internet of Things (IoT) and other applications. VeriSilicon presents a variety of customized silicon solutions, including high-definition video, high-definition audio and voice, in-vehicle infotainment, video surveillance, IoT connectivity, smart wearable, high-end application processor, video transcoding acceleration and intelligent pixel processing, etc. In addition, VeriSilicon has six types of in-house processor IPs, namely GPU IP, NPU IP, VPU IP, DSP IP, ISP IP and Display Processor IP, as well as more than 1,400 analog and mixed signal IPs and RF IPs. Founded in 2001 and headquartered in Shanghai, China, VeriSilicon has 7 design and R&D centers in China and the United States, as well as 11 sales and customer service offices worldwide. VeriSilicon currently has more than 1,200 employees.
Contact VeriSilicon Microelectronics (Shanghai) Co., Ltd.

Learn more about ADC IP core

Uncertainty-Guided Live Measurement Sequencing for Fast SAR ADC Linearity Testing

This paper introduces a novel closed-loop testing methodology for efficient linearity testing of high-resolution Successive Approximation Register (SAR) Analog-to-Digital Converters (ADCs). Existing test strategies, including histogram-based approaches, sine wave testing, and model-driven reconstruction, often rely on dense data acquisition followed by offline post-processing, which increases overall test time and complexity.

Three ways of looking at a sigma-delta ADC device

The growing availability of digital ICs like microcontrollers, microprocessors, and field-programmable gate arrays (FPGAs) allows developers to use complex digital processing techniques rather than analog signal conditioning. For this reason, analog-to-digital converters (ADCs) have become a widely-used component in mixed-signal circuits.

Specifying a PLL Part 1: Calculating PLL Clock Spur Requirements from ADC or DAC SFDR

In high end RF systems, such as 5G radios, the requirements are so stringent that the source of this strongest unwanted tone can be the PLL. This article outlines how spurs in the input clock to the ADC or DAC may limit the SFDR. This in turn will set the requirements for the spurs for the input clock (from a PLL), in order to achieve a specific SFDR.

Save power in IoT SoCs by leveraging ADC characteristics

Power-sensitive applications such as Internet-of-Things (IoT) require a comprehensive power savings strategy within the system-on-chip (SoC). Techniques relying solely on the use of traditional power down modes and low supply voltage may not be enough to achieve the required power targets. The analog block is often assumed to be too sensitive and not compatible with aggressive power management techniques.

High Speed ADC Data Transfer

When continuously running a high speed ADC, it can be a challenge to deal with the firehose of raw data available at the output. To use City Semiconductor’s 2.5 GS/s 12-bit ADC, for example, 30 gigabits per second of data have to be accepted.

Frequently asked questions about ADC IP cores

What is Auxiliary ADC - 12-bit Successive Approximation Register (SAR) ADC?

Auxiliary ADC - 12-bit Successive Approximation Register (SAR) ADC is a ADC IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for globalfoundries Available on request.

How should engineers evaluate this ADC?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this ADC IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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