ARC EM6 32-bit processor core with cache for embedded applications
The ARC® EM4 and EM6 processors are optimized for use in embedded and deeply embedded applications where high performance with mi…
Overview
The ARC® EM4 and EM6 processors are optimized for use in embedded and deeply embedded applications where high performance with minimum power consumption is essential. The cores offer outstanding performance density, delivering 1.81 DMIPS/MHz and 4.18 CoreMark/MHz within a very small footprint and extremely low power consumption.
The ARC EM4 and EM6 processors are based on the ARCv2 instruction set architecture (ISA) and pipeline, which provides leadership power efficiency and code density.
Both the ARC EM4 and EM6 support up to 2MB of closely coupled memory and are ideal for embedded applications in consumer, IoT, networking, automotive and other power- and cost-sensitive applications. The ARC EM6 processor also supports up to 64KB of instruction and data cache.
Key features
- Very small size - 0.01mm2 (28 HPM)
- 1.81 DMIPS/MHz performance, 4.18 CoreMarks/MHz
- Up to 240 interrupts with 16 levels
- 512B - 2MB instruction closely coupled memory (ICCM)
- 512B - 2MB data closely coupled memory (DCCM)
- Up to 64K instruction and data cache (EM6)
- Native ARM® AMBA® AHB™ and AHB-lite™ bus interfaces
- Optional 32x32 or 16x16 multipliers, or both
- Support for custom user extensions - APEX technology
Block Diagram
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Specifications
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Frequently asked questions about MCU IP cores
What is ARC EM6 32-bit processor core with cache for embedded applications?
ARC EM6 32-bit processor core with cache for embedded applications is a MCU IP core from Synopsys, Inc. listed on Semi IP Hub.
How should engineers evaluate this MCU?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MCU IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.