Vendor: Algotronix Ltd. Category: Symmetric Crypto

AES Core XTS

This configurable implementation of the XTS-AES algorithm for storage encryption implements the full NIST SP800-38E specification…

Overview

This highly configurable implementation of the XTS-AES algorithm for storage encryption implements the full NIST SP800-38E specification used in IEEE standard 1619-2007. AES XTS is based on a pipelined implementation of AES to provide throughput to match multi-gigabit storage connection schemes such as USB 3.0 and SATA 3.0.
The AES-XTS core is based on our NIST validated AES-G3 implementation and is supplied as a complete package of VHDL or Verilog source code. The number of pipelined AES encryptors is configurable allowing a flexible tradeoff of area against performance.

Key features

  • Complies with IEEE 1619-2007 and NIST SP800-38E standards
  • Performance selectable to meet or exceed USB 3.0 and SATA 3.0 (6 Gbps), even on low cost FPGA families
  • Low area, implementation of AES-XTS suitable for data storage applications.
  • Based on the NIST validated (Cert #953) AES-G3 implementation of FIPS 197 (November 2001) Advanced Encryption Standard
  • Supports 128 bit keys as standard, with 192 and 256 bit key options available
  • Targets all modern FPGA families from Xilinx, Altera, Microsemi and Lattice.
  • Supplied as easily customizable portable VHDL or Verilog to allow customers to conduct their own code review in high-security applications.
  • Supplied with comprehensive test bench implementing XTSVS tests

Applications

  • Disk and USB drive encryption.
  • Encryption with resistance to tampering where data expansion is not possible so authentication methods which involve appending an integrity check value cannot be used.

What’s Included?

  • VHDL with Testbench.
  • optimizations for Xilinx, Altera, Lattice and Microsemi FPGAs.

Files

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
AES-XTS
Vendor
Algotronix Ltd.

Provider

Algotronix Ltd.
HQ: United Kingdom
Algotronix specialises in encryption IP cores and cryptographic protection of design intellectual property. Our customers include many of the largest defense corporations worldwide as well as government departments and companies in the networking, test equipment and gaming industries. Algotronix encryption IP cores are used in equipment deployed by several NATO countries. Algotronix' philosophy is quality over quantity: rather than building a wide range of IP cores we set out to do a small number of carefully chosen cores very well. We have initially focussed on the Advanced Encryption Standard algorithm and worked hard to make sure that our cores provide the highest levels of performance and area efficiency coupled with great flexibility in implementation options to ensure a good match to customer application requirements.

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Frequently asked questions about Symmetric Cryptography IP cores

What is AES Core XTS?

AES Core XTS is a Symmetric Crypto IP core from Algotronix Ltd. listed on Semi IP Hub.

How should engineers evaluate this Symmetric Crypto?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Symmetric Crypto IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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