Vendor: Xylon Category: ISP Image Signal Processor

ACAP HDR Image Signal Processing Framework

The ACAP HDR Image Signal Processing Framework is intended to showcase a logicBRICKS IP suite implementation of High-Dynamic Rang…

Overview

The ACAP HDR Image Signal Processing Framework is intended to showcase a complete logicBRICKS IP suite implementation of High-Dynamic Range (HDR) Image Signal Processing (ISP) pipeline in an embedded design based on AMD-Xilinx ACAP programmable devices. The HDR ISP pipeline enables crisp camera video under altering and rough lighting conditions in next generation multi-channel embedded systems for use in automotive, surveillance, medical, aerospace and similar video and vision AI applications.

The logicBRICKS logiISP-UHD IP core enables parallel processing of multiple Ultra HD video inputs in different AMD-Xilinx devices, ranging from the small AMD-Xilinx Artix FPGAs to the latest AMD-Xilinx Versal Adaptive Compute Acceleration Platform (ACAP) devices. The design showcases how to connect high-quality inputs from automotive-grade cameras to on-board post-processing solutions or feed the stream to hardware-accelerated integrated neural networks running on this adaptive computing acceleration platform.

Key IP cores, the logiISP-UHD ISP and the logiHDR pipelines, support parallel processing of multiple video inputs, resolutions up to 7680x7680 (including the popular 4K2Kp60 video resolution), merging of two or three exposures, parallel pixel processing and different pixel formats. These IP cores for programmable logic implementations are supplemented with AWB and AE software libraries that use video statistics data collected at video inputs, software drivers, demo applications, reference SoC/ACAP designs, and bit-accurate C models.

The design framework implements three parallel video inputs from three 7.4Mpix Leopard Imaging IMX424 GMSL2 video cameras and the UHD display output. All video inputs are stored in the video memory, and by mean of on-board push buttons, the user can select each of them for the single camera or all cameras full screen display.

Key features

  •  
  • Complete ACAP HDR Image Signal Processing framework for multi-camera embedded applications with three 7.4MP (Ultra High Definition) video inputs from automotive video cameras
  • Delivered as a part of Xylon’s logiVID-ACAP-ISP evaluation kit
  • Enables vision developers to quickly add their own algorithms to the provided infrastructure
  • Jump-starts development and saves valuable design time
  • Intended for use with next generation Maxim Integrated GMSL2 high-speed serial interface
  • Fully compatible with Xylon’s logiVID-ACAP-ISP HDR ISP evaluation kit based on the AMD-Xilinx Versal VCK190 Evaluation Board
  • Includes licensed logicBRICKS IP cores
  • Design prepared for the following environment:
    • AMD-Xilinx Vivado Design Suite 2021.2
    • AMD-Xilinx Vitis Unified Software Platform
  • Runs on Linux OS and includes logicBRICKS software drivers and demo applications
  • HDMI display output with the AMD-Xilinx HDMI 1.4/2.0 Transmitter Subsystem2 controlled via Xylon’s DRM kernel driver
  • Prepared for use with Sony LI-IMX424-GMSL2 Camera with the Sony IMX424 Image Sensor
  • Design can easily be adapted for use with other UHD cameras
  • Input video resolution: 3840x1920@30, Output video resolution: 3840x2160@30
  • Full evaluation version available on request
  • Documentation and Tech support (e-mail)

Block Diagram

Applications

  • Machine Vision and other vision applications,
  • AR/VR,
  • AD/ADAS,
  • AI,
  • guided robotics,
  • drones etc

Specifications

Identity

Part Number
logiREF-ACAP-MULTICAM-ISP
Vendor
Xylon
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Xylon
HQ: Croatia
Xylon is an electronic company focused on design of optimized IP cores for Xilinx FPGA devices, and design services that lower production costs and improve efficiency of electronics designers. The logicBRICKS™ IP core library enable customers to shorten development time, and keep them ahead of competition. The logicBRICKS IPs are supplied with a reach set of deliverables. All IPs have gone through exhaustive tests in production of electronic equipment, and have been in worldwide use for years. The logicBRICKS™ IPs can be fully evaluated on logiCRAFT evaluation/development platforms specially designed for multimedia applications. Xylon's expertise is recognized and valued by European, USA, and Asian customers from various markets. Xylon is ISO9001 certified company.

Learn more about ISP Image Signal Processor IP core

Cadence Unveils the Industry’s First eUSB2V2 IP Solutions

Cadence's industry-first eUSB2V2 IP, built on the advanced TSMC N3P process and compliant with the latest embedded USB2 Version 2 standard, transforms computing devices by delivering unprecedented capabilities for laptops, AI video devices, and advanced image signal processor (ISP) systems.

eUSB2V2 with 4.8Gbps and Use Cases: A Comprehensive Overview

When developing system-on-chip (SoC) solutions, the key features often minimize size, maximize performance, and achieve low power consumption while decreasing costs. These requirements are true for most industries, including AI-powered consumer devices, energy-intensive data centers, cloud-based enterprise systems, and smart autonomous vehicles.

SOC Virtual Prototyping: An Approach towards fast System-On-Chip Solution

In this paper, we discuss the Transaction Level Model which is being developed to act as Virtual Prototype in digital image processors designed to fit into mobile applications. As part of our developments new methodology TLMdevice is also defined which provides way to connect TLM simulations to communicate with not only virtual host devices such as Graphical window, Keyboards but also real host devices like UART, Display and Sensors, so that data can be easily sent and received to/from during TLM simulation run

Frequently asked questions about ISP Image Signal Processor IP

What is ACAP HDR Image Signal Processing Framework?

ACAP HDR Image Signal Processing Framework is a ISP Image Signal Processor IP core from Xylon listed on Semi IP Hub.

How should engineers evaluate this ISP Image Signal Processor?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this ISP Image Signal Processor IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP