12-bit 1-channel 10 to 150 MSPS current steering DAC

055TSMC_DAC_03 is a 12-bit 1-channel DAC that uses a high-performance current control architecture and provides optional differential current output or differential voltage output. The bandgap and current source are included to provide a complete DAC. The DAC can be configured to adjust full-scale output range by adj_scale<5:0> and adj_iref<4:0>. The DAC uses segmentation architecture combined with Q2 random walk algorithm to achieve excellent dynamic and static performance, wide output bandwidth. An internal resistive load (25 or 50 Ohms) together with current source is used to set differential voltage output, which independent from process, supply and temperature.

• TSMC CMOS 55 nm
• Resolution 12 bit
• Sampling rate from 10 MSPS to 150 MSPS
• Adjustable internal differential resistive load
• Adjustable output current
• SFDR: 76 dB@FCLK = 50 MHz and FIN = 2 MHz
• 74 dB@FCLK = 100 MHz and FIN = 4 MHz
• 72 dB@FCLK = 150 MHz and FIN = 6 MHz
• Differential nonlinearity 1.2 LSB
• Integrated nonlinearity 1.6 LSB
• Small silicon area 0.187 mm2

• Wireless infrastructures
• Broadband communications
• Picocell, femtocell base stations
• Medical instrumentation
• Ultrasound transducer excitation
• Signals and arbitrary waveform generators

• Schematic or NetList
• Abstract model (.lef and .lib files)
• Layout view (optional)
• Behavioral model (Verilog)
• Extracted view (optional)
• GDSII
• DRC, LVS, antenna report
• Test bench with saved configurations (optional)
• Documentation