晶心科技本着永续经营的精神理念深耕学界十余年
March 12, 2024 - Hsinchu, Taiwan -- Andes Technology (TWSE: 6533), since the first agreement signed with National Chiao Tung University in 2010, has actively keeping engaged in industry-academia collaboration. Collaborating with universities across Europe, Asia, and US over a decade, Andes has signed agreements with over 80 universities worldwide.
Andes provides CPU IP Cores licensing, AndeSight™ development tools, software, and hardware/software development platforms to facilitate industry-academia collaboration. From the early self-developed V3 series to the fifth-generation V5 RISC-V processor series starting2018, Andes has continuously collaborated with globally renowned institutions for research and product licensing. Over a decade, Andes has actively contributed various hardware/software resources, and established joint laboratories with universities and research institutions. The total number of agreements signed with universities worldwide has exceeded 150.
Recently, as the growing focus on ESG indicators, social responsibility emphasizes that companies must not only prioritize profits and shareholder interests but also uphold responsibilities to employees, society, and the environment. With its long-term commitment to academia, Andes has contributed to campus activities and supported young professionals through industry-academia collaboration projects. These initiatives include providing advanced RISC-V core processing unit IP, System-on-Chip (SoC) technology, comprehensive training materials, professional teaching courses, organizing lectures, seminars, conducting unique certification exams, and hosting the creative Andes Cup competition, among other technical services.
RISC-V, well-known for its open, compact, modular, and extensible instruction set, has garnered significant attention in the market, with widespread adoption in Asia-Pacific markets, including Taiwan, Japan, Korea, China, as well as in Europe and the United States. Among the 150+ school agreements signed, Andes provides the latest RISC-V development tools, such as AndeSight™, RISC-V processor debuggers, project implementation examples, verification, and algorithm performance analysis. In terms of curriculum instruction, National Tsing Hua University (NTHU) was among the first to use Andes’ RISC-V development tools in computer architecture and compiler design courses. NTHU also acquired RISC-V FPGA development platforms Corvette F1 and Corvette T1 for instructional experiments and student projects. Over the past two years, there has been a steady increase in enrollment, with over 400 students using the tools annually at NTHU. More than ten universities have incorporated Andes tools and platforms into their teaching, accumulating over 5,000 students in the last five years.
In the realm of processor IP licensing projects, there have been a total of more than a dozen RISC-V projects licensed. These projects span various applications, including biomedical, security, Artificial Intelligence (AI), Internet of Things (IoT), and machine learning (ML), with a particular focus on AI research. The licensed processors range from the entry-level processor N22, the 5-stage pipeline processor N25, to the vector processor NX27V and the high-end multicore processor AX45MP. Some research teams obtained licenses for the AndesCore™ V5 RISC-V core and successfully completed tape-out and chip testing at the Taiwan Semiconductor Research Institute of NARLabs. Furthermore, some research teams, based on academic research outcomes, have established startup companies, with updated commercial agreement re-signed, transforming academic licenses into commercial licenses to turn research results into commercial chip for the market.
The Andes Certified Engineer Test (ACET™ Program) is designed to help students obtain certifications and has been recognized by various educational institutions. Students who pass the exam not only meet graduation requirements but also acquire industry skills such as programming, practical operations, and reading product documentation. By integrating these skills with the school’s programming language courses and embedded platform operations, students gain insights into the industry’s product development process and gain early exposure to engineering work. Recently, the platform used for certification exam has transitioned to the RISC-V platform, with a steady growth in registrations, accumulating 2,000 applicants over thirteen years. To encourage more students to participate in RISC-V development, Andes Technology also organizes competition campaigns with substantial cash prizes. The second annual Andes Cup held in 2023, themed “The Great Advance of Artificial Intelligence,” attracted 43 teams from 17 schools.
Frankwell Lin, Chairman and CEO of Andes Technology, stated, “Andes Technology has integrated ESG into annual goals by supporting schools with resources like AndesCore™ and AndeSight™ for research and tech development. This initiative helps cultivate students with practical skills and provides assistance to universities participating in collaborative projects. Through diverse industry-academia cooperation programs, Andes Technology is committed to achieving the dual goals of talent cultivation and industry cooperation, in order to give back to society.”
About Andes Technology
Nineteen years in business and a Founding Premier member of RISC-V International, Andes is a publicly-listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high-performance/ low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit Out-of-Order processors with DSP, FPU, Vector, Linux, superscalar, functional safety, and/or multicore capabilities. By the end of 2023, the cumulative volume of Andes-Embedded™ SoCs has surpassed 14 billion. For more information, please visit https://www.andestech.com.
Related Semiconductor IP
- RISC-V CPU IP
- RISC-V Vector Extension
- RISC-V Real-time Processor
- RISC-V High Performance Processor
- 32b/64b RISC-V 5-stage, scalar, in-order, Application Processor. Linux and multi-core capable. Maps upto ARM A-35. Optimal PPA.
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