Vendor: PRSsemicon Group Category: USB

USB 3.0 SSIC Controller

GDA's USB 3.0 SSIC controller is a configurable core and implements the USB 3.0 SSIC functionality that can be interfaced with th…

Overview

GDA's USB 3.0 SSIC controller is a highly configurable core and implements the USB 3.0 SSIC functionality that can be interfaced with third party M-PHY's. GDA SSIC Controller core is architected to seamlessly integrate with either in-house developed SS Host/Device Controller cores or with standard 3rd party SS Host/Device Controller cores. It is carefully partitioned to support standard power management schemes which include extensive clock gating and multiple power wells for aggressive power savings required for mobile and handheld applications.
The controller when integrated with in-house Device/xHCI Host controller has a very simple application interface which can be easily adapted to standard on-chip-bus interfaces such as
AXI, AHB, OCP as well as other standard off-chip interconnects making it easy to be integrated in a wide range of applications.

Configurable Options
- Application Interface – AHB, AXI, PCIe-MPHY
- Optional xHCI Engine with configurable number of device
- slots, interrupters, root hub ports, configurable scratchpad support, optional support for host initiated stream data movement and optional debug capability etc
- Optional Device Controller with configurable number of Endpoints,
- Types, DMA Engine and EP0 Processor
- Number RMMI Lanes support

Key features

  • Compliant with SSIC v1.01
  • Compliant with M-PHY Specification v2.0
  • Compliant with USB3.0 Pipe Specification.
  • Supports Type I M-PHY Port.
  • Supports 1/2/4 M-PHY Lanes.
  • Supports PWM-G1, HS-G1/G2/G3 Rate A/B series.
  • Implements PHY adaptor which bridges between RMMI and USB 3.0 Pipe.
  • Asynchronous clocking USB 3.0 Controller and RMMI Bridging Layer.
  • Configurable USB 3.0 PIPE Interface: 8, 16, 32 bit.
  • Configurable RMMI Interface width: 8, 16, 32-bit.
  • Supports Aggressive Low Power Management.
  • Can seamlessly integrate with 3rd Party USB 3.0 Host/Device Controller cores.
  • Can integrate with in-house USB 3.0 Host/Device Controller to expose flexible User
  • Application Logic
  • Can be adapted by any SoC / OCB interface / offchip interconnects – such as AHB, AXI, PCIe
  • Configurable Datawidth: 32, 64, 128 bit.
  • Simple Register Interface for internal Register Access.
  • Support for various Hardware and Software Configurability regarding Core characteristics.

Block Diagram

Benefits

  • Highly modular and configurable design
  • Layered architecture
  • Fully synchronous design
  • Supports both sync and async reset
  • Clearly demarked clock domains
  • Extensive clock gating support
  • Multiple Power Well Support
  • Software control for key features
  • Multiple loop backs for debug

What’s Included?

  • Configurable RTL Code
  • HDL based test bench and behavioral models Test cases
  • Protocol checkers, bus watchers and performance monitors
  • Configurable synthesis shell

Specifications

Identity

Part Number
usb3_ssic
Vendor
PRSsemicon Group
Type
Silicon IP

Provider

PRSsemicon Group
HQ: India
PRSsemicon is a fabless semiconductor company with a vision to provide Professional Reliable Solutions, Services & Support to our customers & partners globally. Our R&D Business Unit develops cutting edge IP Products, Our Business administration BU ties up with several partners who require our support to promote & resell their reliable IP's, Our Services BU helps customer on ASIC/FPGA/SoC Design Verification & Validation services.

Learn more about USB IP core

What Designers Need to Know About USB Low-Power States

In addition to performance and interoperability, achieving low power has been one of the requirements for industry standards specifications. Some of the key specifications like Universal Serial Bus (USB), PCI Express (PCIe), and MIPI have defined power saving features for burst traffic. This whitepaper explains how Synopsys USB IP offers low power using various low power states that go beyond the basic features.

Frequently asked questions about USB IP cores

What is USB 3.0 SSIC Controller?

USB 3.0 SSIC Controller is a USB IP core from PRSsemicon Group listed on Semi IP Hub.

How should engineers evaluate this USB?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this USB IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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