Vendor: SmartDV Technologies Category: Smartcard

SmartCard (IEC7816) Verification IP

SmartCard (IEC7816) Verification IP is a smart way to verify the SmartCard (IEC7816) component of a SOC or ASIC.

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Verification IP View all specifications

Overview

SmartCard (IEC7816) Verification IP is a smart way to verify the SmartCard (IEC7816) component of a SOC or ASIC. The SmartDV's SmartCard (IEC7816) Verification IP is fully compliant with standard IEC7816 Specification IEC7816-3. It supports all frame types such as Character frame and Block frame. The SmartCard (IEC7816) Verification IP monitor acts as powerful protocol-checker, fully compliant with IEC7816 specification ISO/IEC7816. IEC7816 Verification IP includes an extensive test suite covering all possible scenarios. It can perform all protocol tests in a directed or a highly randomized fashion which adds the possibility to create the widest range of scenarios to verify the DUT effectively. This way it detects violation of protocol completely.

SmartCard (IEC7816) Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

SmartCard (IEC7816) Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key features

  • Adherent to ISO/IEC 7816-3 Specification.
  • Complete IEC7816-3 Master/Slave functionality.
  • Complete Smart Card and SIM Card commands supported.
  • Supports all functions for complete smart card sessions, including
    • Card activation and deactivation
    • Cold/Warm reset
    • Answer to Reset (ATR) response reception
    • Data transfers to and from the card
  • Supports adjustable clock rate and bit (baud) rate.
  • Supports configurable automatic byte repetition.
  • Supports commonly used communication protocols
    • T=0 for asynchronous half-duplex character transmission, and
    • T=1 for asynchronous half-duplex block transmission
  • Supports Sleep mode and Clock stop mode.
  • Supports automatic convention detection.
  • Supports automatic voltage class selection.
  • Supports Configurable timing functions.
    • Smart card activation time
    • Guard time
    • Timeout timers
  • Supports all three resynchronization levels for the Interface device of the transmission protocol,
    • Retransmission of blocks
    • Use of S(RESYNCH request)
    • Warm reset or deactivation
  • Supports all three resynchronization levels for the Card of the transmission protocol,
    • Retransmission of blocks
    • Use of S(RESYNCH response)
    • Without action by the interface device, the card becomes unresponsive
  • Supports all types of error insertion and detection,
    • Character parity error(s)
    • Redundancy code error
    • Invalid PCB
    • Invalid LEN
    • Loss of synchronization
    • Failure to receive the relevant S(response) after having transmitted S(request)
  • Supports some common Smart Card device model.
  • Supports both synchronous and asynchronous mode of communication.
  • Supports both type of CRC poly
    • ISO/IEC 13239, or ISO/IEC 14443-3 type B, or ITU-T Rec. V.42
    • CRC-T1 as used by many ISO/IEC 7816-3 readers
  • Monitors, detects and notifies the testbench of significant events such as transactions, warnings, timings and protocol violations.
  • Slave/Card BFM supports some standard Smart Card and SIM Card chips.
  • Supports constraints Randomization.
  • Status counters for various events on bus.
  • Callbacks in transmitter, receiver and monitor for user processing of data.
  • SmartCard (IEC7816) Verification IP comes with complete test suite to test every feature of IEC7816 specification.
  • Functional coverage for complete IEC7816 features.

Block Diagram

SmartCard (IEC7816) VIP block diagram

Benefits

  • Rich set of configuration parameters to control the functionality.
  • Faster testbench development and more complete verification of SmartCard (IEC7816) designs.
  • Easy to use command interface simplifies testbench control and configuration of Tx and Rx.
  • Simplifies results analysis.
  • Runs in every major simulation environment.

What’s Included?

  • Complete regression suite containing all the SmartCard (IEC7816) testcases.
  • Examples showing how to connect various components, and usage of Tx,Rx and Monitor.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation contains User's Guide and Release notes.

Specifications

Identity

Part Number
SmartCard (IEC7816) VIP
Vendor
SmartDV Technologies
Type
Verification IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
Contact SmartDV Technologies

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Frequently asked questions about Smartcard IP cores

What is SmartCard (IEC7816) Verification IP?

SmartCard (IEC7816) Verification IP is a Smartcard IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this Smartcard?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Smartcard IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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