Vendor: NTLab Category: Power Management Unit

Power Management Unit (1.1 - 1.4V output voltage, load current 5 mA)

055TSMC_PMU_01 is designed to form stabilized voltage with overcurrent indication (bit Status).

Contact Provider Request Datasheet
TSMC 55nm GP Silicon Proven View all specifications

Overview

055TSMC_PMU_01 is designed to form stabilized voltage with overcurrent indication (bit Status). The block has configurable output voltage (1.1/1.2/1.3/1.4V) with parameters specified for 5 mA output current. The Status bit is set to "1", when the load current is greater than 15 mA.

Key features

  • TSMC CMOS 55 nm
  • Output voltage: 1.1 ... 1.4 V
  • Low current consumption
  • Overcurrent indication
  • Low voltage drop

Block Diagram

055TSMC_PMU_01 block diagram

Applications

  • Supply voltage sensitive circuits
  • Power solutions
  • Clocking systems

What’s Included?

  • Schematic or NetList
  • Abstract view (.lef and .lib files)
  • Layout (optional)
  • Verilog behavior model
  • Extracted view (optional)
  • GDSII
  • DRC, LVS, antenna report
  • Test bench with saved configurations (optional)
  • Documentation

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Silicon Options

Foundry Node Process Maturity
TSMC 55nm GP Silicon Proven

Specifications

Identity

Part Number
055TSMC_PMU_01
Vendor
NTLab

Provider

NTLab
HQ: Lithuania
NTLab is a vertically integrated microelectronics design center. It has 70+ experienced and qualified engineers. NTLab specializes in the designing of mixed-signal and RF ICs and Systems-on-Chip. It has a wide range of own silicon-verified IP blocks: processor cores, interfaces, analog and high-frequency PHYs, etc., thus allowing customized design to be fast and predictable. In-company unique combination of competences in digital, analog and RF circuits and embedded software enables NTLab to participate in the projects that require deep research and utilize most sophisticated and advanced techniques: multi-system GPS/GLONASS/Galileo/BeiDou/NavIC(IRNSS)/QZSS/SBAS navigation, RF ID, wireless communications, etc. All designed ICs are provided with test and development tools, as well as with reference software. NTLab offers a wide range of silicon proven analog/mixed-signal IPs in 0.35µm, 0.25 µm, 0.18 µm, 0.13 µm, 0.09 µm, 65nm, 55nm, 40nm, 28nm, 22 nm CMOS and SiGe BiCMOS processes. These IPs are suitable for devices targeted both consumer and industrial markets. Most of these IPs have been proven in silicon on the foundries: Samsung, UMC, GlobalFoundries, SMIC, VIS, Tower, X-FAB, iHP, AMS, SilTerra, STMicroelectronics, Winfoundry.
Contact NTLab

Learn more about Power Management Unit IP core

A versatile Control Network of power domains in a low power SoC

Developing and verifying a control network in a low-power SoC is a challenging task, especially managing the different states of regulators and modes of power domains. This article first describes state-of-the-art approaches to addressing this issue, and then delves into the solution promoted by Dolphin Integration to go further, thanks to the easy and secure Maestro� solution to manage SoC power mode transitions.

An ESD efficient, Generic Low Power Wake up methodology in an SOC

As the semiconductor industry is moving towards lower technology nodes, more and more complexity is being introduced in the design to beat the competition and provide most innovative solution to cater the needs. One of the biggest challenges that the designer faces is in terms of the keeping the power budgets of the chip within the specification and even innovate to reduce the current numbers. Depending on the application requirements, the designers have to tune up the power profile of the SoC. There are various ways to do so like dynamically changing frequency and voltage of operation, considering system level contributions to power consumption, using various modes of operation etc. In most of the cases, SoC has to support various power modes like Run mode, Sleep mode, Halt mode etc. Different power numbers are defined for each mode. Run modes can further be divided in various sub modes depending on application.

D32PRO, scalable & royalty free 32-bit CPU

D32PRO is one of the newest 32-bit CPUs available on the market. It’s been designed by Digital Core Design, IP Core provider and SoC design house from Poland, responsible e.g. for the world’s fastest or world’s smallest 8051 CPU. DCD launched more than 70 different architectures since 1999, which have been implemented in more than 300 000 000 electronic devices, that’s why one can be sure that quite considerable experience stands behind the D32PRO.

Semiconductor IP FAQ

What is Power Management Unit (1.1 - 1.4V output voltage, load current 5 mA)?

Power Management Unit (1.1 - 1.4V output voltage, load current 5 mA) is a Power Management Unit IP core from NTLab listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.

How should engineers evaluate this Power Management Unit?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Power Management Unit IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP