Vendor: SmartDV Technologies Category: PDM

PDM Verification IP

PDM can digitally represents high quality audio, and is inexpensive and easy to implement.

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Verification IP View all specifications

Overview

PDM can digitally represents high quality audio, and is inexpensive and easy to implement. In PDM,an analog signal can be directly sampled at a high sampling rate and converted to a PDM stream.

PDM Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

PDM Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key features

  • Full PDM Transmitter and Receiver functionality
  • Supports 8,10,12,16,20,24,32 bit data precision
  • Supports PDM modulator and PDM demodulator
  • Supports PDM Digital output
  • Supports PDM error output
  • Notifies the testbench of significant events such as transactions, warnings, timing and protocol violations.
  • Status counters for various events on bus.
  • Callbacks in transmitter, receiver and monitor for various events.
  • Supports constraints Randomization.
  • Built in functional coverage analysis.
  • PDM Verification IP comes with complete test suite to test every feature of PDM specification.

Block Diagram

PDM VIP block diagram

Benefits

  • Faster testbench development and more complete verification of PDM designs.
  • Easy to use command interface simplifies testbench control and configuration of master and slave.
  • Simplifies results analysis.
  • Runs in every major simulation environment.

What’s Included?

  • Complete regression suite containing all the PDM testcases.
  • Examples showing how to connect various components, and usage of Master, Slave and Monitor.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation also contains User's Guide and Release notes.

Specifications

Identity

Part Number
PDM VIP
Vendor
SmartDV Technologies
Type
Verification IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
Contact SmartDV Technologies

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Frequently asked questions about PDM IP cores

What is PDM Verification IP?

PDM Verification IP is a PDM IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this PDM?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PDM IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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