Memory Interface IP Cores for TSMC

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Memory interface IP cores connect processing subsystems to external or embedded memory devices. They include memory controllers, PHYs, controller-plus-PHY subsystems, and interface solutions for DRAM, flash, and high-bandwidth memory technologies.

Browse memory interface IP for DDR, LPDDR, GDDR, HBM, NAND Flash, and NOR Flash with features such as protocol compliance, timing management, ECC, training, low latency, high bandwidth, and process-node optimized PHY integration.

 
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Compare 324 Memory Interface IP Cores for TSMC from 11 vendors

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Semiconductor IP