Overview
The synthesizable IEEE1394b Link Layer Controller Core, FireLink®, is based on the Link Layer Controller that has been used for several years in the FireSpy® analyzers produced by DapTechnology. The code is written in VHDL and reference designs are currently available for Xilinx and soon for Altera FPGAs. DapTechnology offers two packages, i.e. Basic and Extended with differnet features and functions.
Currently, the LLC provides the control for transmitting and receiving 1394 packet, including asynchronous packets, isochronous packets and Phy packets, at speeds up to 800Mb/s. Future enhancements will support S1600 and S3200 speeds. However, support for these speeds is pending the final PHY/Link interface standardization.
As a special option, the FireLink® LLC offers Firmware Support for the AS5643 (Mil1394) protocol. While current implementations require significant host SW support the FireLink can support this layer with significantly better timing as well as reduced host resource utilization. Typical examples of applications in aerospace & defense for the FireLink® would include command & control systems for space-based vehicles, missile platforms, and fighter aircraft, as well as its implementation in avionics & IFE platforms for business and commercial aircraft.
Learn more about Firewire IP core
It's a common misconception that IEEE 1394 links are limited to 4.5 m in length. This perception is no doubt caused by the statement found in the IEEE 1394 standard that all three types of cables (4-, 6-, and 9-pin) have "a suggested maximum length of 4.5 m." The 1394 standard goes on to point out that longer length cables are possible, but this has been largely overlooked and misunderstood. Additionally, IEEE 1394-2008 contains several clauses that specify long-haul media, which can support much longer distances.
Time to market is most important criteria for survival in the IC design industry. For this one should produce low cost good quality silicon in lesser time. In order to achieve this, design should be validated well before tape out in application area ecosystem and all software should be ready before silicon comes in the lab. This objective can be achieved by porting design and test environment to the emulator. This paper deals with art of skillfully porting a SoC on to emulator, architecting virtual evaluation board (EVB) and benefits of using emulation.
Eric Esteve, IPnest
While IEEE 1394/Firewire is a popular and proven standard familiar to many system designers, there is still the potential to make design errors that can compromise performance. Here are some tips for avoiding such problems
To address the bandwidth limitations of the USB 2.0 interface, the USB Implementers Forum (USB-IF) released the SuperSpeed USB 3.0 specifications in November 2008. The USB 3.0 specification provides a maximum bandwidth of up to 5Gbps while limiting power consumption. In this white paper we present the features of the USB 3.0 protocol, discuss the new usage models it enables and compare it with some of the existing interface standards popular in the market today.
Serial Advanced Technology Attachment (SATA) has become the dominant interface for internal storage in desktops, notebooks and consumer electronics devices.
