Vendor: Creonic Category: Modulation Demodulation

CCSDS 131.2 Wideband Demodulator

The Creonic CCSDS high performance wideband demodulator performs all tasks of an inner receiver.

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Overview

The Creonic CCSDS high performance wideband demodulator performs all tasks of an inner receiver. It allows for processing symbol rates of 500 Msymb/s on state-of-the-art FPGAs. The demodulator expects the quantized, complex baseband samples from ananalog-digital-converter (ADC) and recovers timing, frequency and phase of the complex mapped symbols. In addition, the core handles PL frame recovery and PL deframing. The output inter-face of the demodulator perfectly fits the Creonic CCSDS forward error correction IP core that implements a Serial Concatenated Convolutional Code (SCCC) decoding.

Key features

  • Compliant with CCSDS 131.2-B-1
  • Supports ACM mode
  • Supports roll-off factors 5%, 10%, 15%, 20%, 25% and 35%
  • Support for blocks with pilots only
  • Support for QPSK to 64-APSK
  • Output of XFECFRAMEs for further processing by the FEC decoder

Block Diagram

CCSDS 131.2 Wideband Demodulator block diagram

Benefits

  • Contains radio interface, decimator, timing recovery, equalizer, frame acquisition, and carrier recovery
  • Performs and supports DC offset correction, I/Q imbalance correction (optional), decimation (optional), FFT-based blind frequency estimation, coarse frequency estimation, timing recovery, matched filtering, downsampling, frame synchronization, fine frequency correction, coarse and fine phase correction, equalization, PL descrambling, and PL deframing
  • Low-power and low-complexity design
  • On-the-fly configuration
  • Memory mapped interface for controlling the core and for retrieving status information
  • Very fast synchronization due to different sets of filter coefficients for acquisition and tracking mode
  • Configurable interrupts and output of synchronization status information
  • AXI4-Stream handshaking interfaces for seamless integration
  • Perfectly fits to the Creonic CCSDS SCCC Turbo decoder
  • Available for ASIC and FPGAs (AMD Xilinx, Intel)

Applications

  • Satellite communication
    • High data rate telemetry applications
    • Earth Exploration Satellite Service (EESS)
  • Applications with the highest demands on forward error correction
  • Applications with the need for a wide range of code rates and block lengths

What’s Included?

  • VHDL source code or synthesized netlist
  • HDL simulation models
  • Bit-accurate Matlab, C or C++ simulation model
  • Comprehensive documentation

Specifications

Identity

Part Number
CCSDS 131.2 Wideband Demodulator
Vendor
Creonic
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Creonic
HQ: Germany
Creonic is an ISO 9001:2015 certified provider of ready-for-use IP cores for wired, wireless, fiber, and free-space optical communications. All relevant digital signal processing algorithms are covered, including, but not limited to, forward error correction, modulation, equalization, and demodulation. The company offers the richest product portfolio in this field, covering standards like 3GPP 5G, DVB-S2X, DVB-RCS2, CCSDS, andWiFi. The products are applicable for ASIC and FPGA technologies and comply with the highest requirements with respect to quality and performance. For more information, please visit our website at www.creonic.com .
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Frequently asked questions about Modulation and Demodulation IP cores

What is CCSDS 131.2 Wideband Demodulator?

CCSDS 131.2 Wideband Demodulator is a Modulation Demodulation IP core from Creonic listed on Semi IP Hub.

How should engineers evaluate this Modulation Demodulation?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Modulation Demodulation IP.

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