Vendor: CAST Category: Image Conversion

Baseline JPEG Decoder

This JPEG decompression IP core supports the Baseline Sequential DCT mode of the ISO/IEC 10918-1 standard.

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Overview

This JPEG decompression IP core supports the Baseline Sequential DCT mode of the ISO/IEC 10918-1 standard. It implements a high-performance hardware JPEG decoder that is very small in silicon area.  

The JPEG-D-S Decoder decompresses JPEG images and the video payload for Motion-JPEG container formats. It accepts compressed streams of images with 8-bit color samples and up to four color components, in all widely-used color subsampling formats.  

The compact decoder core processes one color sample per clock cycle, enabling it to process multiple Full-HD channels even in low-cost FPGAs.  

Once programmed, the easy-to-use decoder operates on a standalone basis, parsing marker segments and decompressing coded data with no assistance from a host processor. The decoder reports the image format (i.e., resolution, subsampling format, and color sample-depth) to the system, so that the decoded images are properly further processed and/or displayed. 

SoC integration is straightforward thanks to standardized AMBA® interfaces: AXI Streaming for pixel and decompressed data, and a 32-bit APB slave interface for registers access.  

Customers with a short time to market requirements can use CAST’s IP Integration Services to receive complete JPEG subsystems. These integrate the JPEG decoder with video interface controllers, Hardware UDPIP or Transport Stream networking stacks, or other IP cores available from CAST.  

The core is designed with industry best practices, and its reliability and low risk have been proven through both rigorous verification and customer production. Its deliverables include a complete verification environment and a bit-accurate software model.

Key features

  • Area-efficient, high-performance Baseline JPEG decoder
  • Standards Support 
    • ISO/IEC 10918-1 Standard Baseline Decoder  
    • Single-frame JPEG images and Motion JPEG payloads 
    • Up to four color components 
    • 8-bit color samples 
    • All widely used color subsampling formats, and any image size up to 64k x 64k  
    • All scan configurations and all JPEG formats  
    • All marker segments expect DNL 
    • Up to four Huffman Tables  
    • Up to four 8-bit or 16-bit Quantization tables  
  • Interfaces 
    • AXI Streaming I/O data interfaces 
    • APB Control/Status interface 
    • Optional AHB wrapper with DMA capabilities 
  • Performance and Size 
    • One decoded sample per clock cycle 
    • Small silicon footprint (~65k Gates) 
  • Ease of Integration 
    • Requires no programming or control from host  
    • Reports image format 
    • Detects and reports marker syntax errors 
    • Delivered with bit-accurate software model  
    • Optional Block-to-Raster Conversion with AXI or standard memory interface towards the lines buffer 
  • Format 
    • Available as a targeted FPGA netlist

Block Diagram

JPEG-D-S block diagram

Specifications

Identity

Part Number
JPEG-D-S
Vendor
CAST
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

CAST
HQ: USA
CAST is a silicon intellectual property (IP) developer, aggregator, and integrator providing IP cores and subsystems since 1993. Our product line features both leading-edge and standards-based digital IP, including compression engines and image processing functions; 8051 microcontrollers and low-power 32-bit BA2X™ processors; industry-leading automotive interfaces; a complete family of SoC security modules; and a variety of peripherals, interfaces, and other IP cores. Our goal is to maximize IP benefits for our customers by delivering high quality, easy to use, cost effective solutions for real system development challenges. We minimize customer risk through rigorous development standards, complete deliverables with comprehensive documentation, and superlative customer support. We maximize customer value thorough competitive pricing and simple licensing—including royalty-free options—and long-term partnerships with all leading silicon providers and select technology leaders. Our product standards and business practices have been uniquely honed through successful projects with hundreds of systems designers since the very beginnings of the IP industry, making CAST one of the best IP partners available.
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Frequently asked questions about image conversion IP cores

What is Baseline JPEG Decoder?

Baseline JPEG Decoder is a Image Conversion IP core from CAST listed on Semi IP Hub.

How should engineers evaluate this Image Conversion?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Image Conversion IP.

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