512-bit EEPROM with configuration 16p1w32bit
The block is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 512 bits (32(bit per word) x …
Overview
The block is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 512 bits (32(bit per word) x 1(word per page) x 16(page)), which is organized as 16 pages of 1 words by 32 bit with single-bit output data and parallel write data.
Data writing in EEPROM consists of 2 phases - erasing and writing. Written EEPROM page data comes to input din<31:0>.
Erasing of words from page, performed by setting a signal hv_on, with the signal erase is at state «1». The address of erased page is defined the bus adr<3:0>. Value of the bus adr<3:0> doesn't change throughout all cycle of deleting (while hv_on = «1»).
Data writing from latches to the words is produced by signal setting hv_on, thus the signal write is in a state «1».
Data reading is performed using the sample signal.
Memory is optimized for usage in the industrial and commercial applications, requiring low power consumption and supply voltage.
Key features
- SMIC EEPROM CMOS 0.18 um
- High density of memory cells
- Writing and erasing data by one high-voltage pulse
- Programming and erase time – 2 ms (determined by specification of the EEPROM SMIC cell)
- Page writes allowed
- Data retention over 10 years (endurance 105 cycles, determined by SMIC technology)
- Low power dissipation in standby and active mode
- Internally organized 32(bit per word) x 1(word per page) x 16(page) bit
- Supported foundries: TSMC, UMC, Global Foundries, SMIC, iHP, AMS, Vanguard, SilTerra
Block Diagram
Applications
- Access control systems
- Radio-frequency identification systems, smart cards
- Electronic devices with battery power
- Chip serial ID and chip safety
- Electronic tags UHF band
What’s Included?
- Schematic
- GDSII
- Abstract view (.lef and .lib files)
- DRC, LVS, antenna reports
- Datasheet
Files
Note: some files may require an NDA depending on provider policy.
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| SMIC | 180nm | G | Silicon Proven |
Specifications
Identity
Provider
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Frequently asked questions about EEPROM IP cores
What is 512-bit EEPROM with configuration 16p1w32bit?
512-bit EEPROM with configuration 16p1w32bit is a EEPROM IP core from NTLab listed on Semi IP Hub. It is listed with support for smic Silicon Proven.
How should engineers evaluate this EEPROM?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this EEPROM IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.