TSMC 28HPC+ Leakage Monitor
CT23302 provides means to determine the leakage current of some pre-defined MOS devices in the TSMC 28n technology node.
Overview
CT23302 provides means to determine the leakage current of some pre-defined MOS devices in the TSMC 28n technology node.
It is also possible to estimate the leakage process corner (fast or slow) of the IC die by comparing the measured values with a fixed table.
CT23302 is designed to have the capability of monitoring both core NMOS or PMOS process leakage current for the ultra-low Vt and standard Vt devices.
The Op-Amp integrator plus a comparator, translates the leakage current in a time value.
The digital logic controls the enable signals of the devices under test (DUT MOS) and the counter, which measures the time produced by the selected internal DUT.
The output result is a number inverse of the leakage current of the DUT.
Key features
- Supply 1.8V and 0.9V
- SVT and ULVT P and N devices
- Estimation of current density from 5pA/µm up to 5µA/µm
Block Diagram
Benefits
- PVT characterized
- Easy portability
- In mass-production
Applications
- General Purposes IP
What’s Included?
- Datasheet
- Integration guidelines
- GDS2 and LVS Netlist
- Footprint (.LEF)
- Test Specifications
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 28nm | HPC+ | — |
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about Reliability Monitor IP cores
What is TSMC 28HPC+ Leakage Monitor?
TSMC 28HPC+ Leakage Monitor is a Reliability Monitor IP core from Canova Tech Srl listed on Semi IP Hub. It is listed with support for tsmc.
How should engineers evaluate this Reliability Monitor?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Reliability Monitor IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.