Vendor: SMIC Category: Analog

SMIC 110nm G Compact digital, analog and oscillator IO

SMIC 110nm G Silicon Proven View all specifications

Key features

  • Compact digital, analog and oscillator IO;
  • Cell Size (Width * height) 25um * 185um with DUP stagger bonding pads;
  • Work voltage: 3.3V power with 5V input tolerancer;
  • Compact IO size for critical core limited chip design;
  • SMIC 0.11um Mixed Signal 1.2V/3.3V Proce;
  • Suitable for 6, 7 and 8 layers application;

Silicon Options

Foundry Node Process Maturity
SMIC 110nm G Silicon Proven

Specifications

Identity

Part Number
SPC011D3P
Vendor
SMIC
Type
Silicon IP

Provider

SMIC
HQ: China
Semiconductor Manufacturing International Corporation ("SMIC"; NYSE: SMI; SEHK: 981) is one of the leading semiconductor foundries in the world and the largest and most advanced foundry in mainland China. SMIC provides integrated circuit (IC) foundry and technology services at 0.35-micron to 28-nanometer. Headquartered in Shanghai, China, SMIC has a 300mm wafer fabrication facility (fab) and a 200mm mega-fab in Shanghai; a 300mm mega-fab in Beijing and a majority owned 300mm fab for advance nodes under development; a 200mm fab in Tianjin; and a 200mm fab project under development in Shenzhen. SMIC also has marketing and customer service offices in the U.S., Europe, Japan, and Taiwan, and a representative office in Hong Kong.

Learn more about Analog IP core

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Frequently asked questions about Analog I/O Pad Library IP cores

What is SMIC 110nm G Compact digital, analog and oscillator IO?

SMIC 110nm G Compact digital, analog and oscillator IO is a Analog IP core from SMIC listed on Semi IP Hub. It is listed with support for smic Silicon Proven.

How should engineers evaluate this Analog?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Analog IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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