Timing Fragility Aware Selective Hardening of RISCV Soft Processors on SRAM Based FPGAs
This paper introduces a timing fragility aware selective hardening methodology for RISCV soft processors implemented on SRAM based FPGAs.
Vendor:
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Category:
SRAM
CSMC 0.18um 90% shrunk Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Via1 ROM Compiler
VeriSilicon CSMC 0.16um High-Speed Synchronous Memory Compiler optimized for CSMC TECHNOLOGIES CORPORATION Fab2 0.16um MS/RF proc…
Overview
VeriSilicon CSMC 0.16um High-Speed Synchronous Memory Compiler optimized for CSMC TECHNOLOGIES CORPORATION Fab2 0.16um MS/RF process can flexibly generate memory blocks via a friendly GUI or shell commands.
The compiler supports a comprehensive range of word and bit lengths. While satisfying speed and power requirements, it has been optimized for area efficiency.
VeriSilicon CSMC Synchronous Memory Compiler uses four layers within the blocks and supports metal 4, 5 or 6 as the top metal. Dummy bit cells are synthesized with the intention to enhance reliability
The compiler supports a comprehensive range of word and bit lengths. While satisfying speed and power requirements, it has been optimized for area efficiency.
VeriSilicon CSMC Synchronous Memory Compiler uses four layers within the blocks and supports metal 4, 5 or 6 as the top metal. Dummy bit cells are synthesized with the intention to enhance reliability
Key features
- High Density
- High Speed
- Size Sensitive Self-Time Delay for Fast Access
- Automatic Power Down
- Tri-State Output(SRAM only)
- Write Mask Function(SRAM & Register File)
Specifications
Identity
Part Number
CSMC16 MC
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP
Provider
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
HQ:
USA
VeriSilicon Microelectronics (Shanghai) Co., Ltd. (VeriSilicon, 688521.SH) is committed to providing customers with platform-based, all-round, one-stop custom silicon services and semiconductor IP licensing services leveraging its in-house semiconductor IP. Under the unique "Silicon Platform as a Service" (SiPaaS) business model, depending on the comprehensive IP portfolio, VeriSilicon can create silicon products from definition to test and package in a short period of time, and provides high performance and cost-efficient semiconductor alternative products for fabless, IDM, system vendors (OEM/ODM), large internet companies and cloud service provider, etc. VeriSilicon's business covers consumer electronics, automotive electronics, computer and peripheral, industry, data processing, Internet of Things (IoT) and other applications.
VeriSilicon presents a variety of customized silicon solutions, including high-definition video, high-definition audio and voice, in-vehicle infotainment, video surveillance, IoT connectivity, smart wearable, high-end application processor, video transcoding acceleration and intelligent pixel processing, etc. In addition, VeriSilicon has six types of in-house processor IPs, namely GPU IP, NPU IP, VPU IP, DSP IP, ISP IP and Display Processor IP, as well as more than 1,400 analog and mixed signal IPs and RF IPs.
Founded in 2001 and headquartered in Shanghai, China, VeriSilicon has 7 design and R&D centers in China and the United States, as well as 11 sales and customer service offices worldwide. VeriSilicon currently has more than 1,200 employees.
Learn more about SRAM IP core
Novel Trade-offs in 5 nm FinFET SRAM Arrays at Extremely Low Temperatures
Why SRAM PUF Technology Is the Bedrock of Dependable Security in Any Chip
Vincent van der Leest, Synopsys
AI-driven SRAM demand needs integrated repair and security
Increasing popularity of AI applications and DPU architecture has led to growing demand for higher SRAM densities, in turn placing challenges on SRAM yield and reliability.
A comparison of SRAM vs quantum-derived semiconductor PUFs
This article explores the relative performance of SRAM PUF and quantum-derived semiconductor PUF technologies for IoT security.
Basics of SRAM PUF and how to deploy it for IoT security
This article covers the basics of what an SRAM PUF (physical unclonable function) is and how it works, as well as the functionality it offers in internet of things (IoT) security as the trust anchor for any device.
Frequently asked questions about SRAM IP cores
What is CSMC 0.18um 90% shrunk Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Via1 ROM Compiler?
CSMC 0.18um 90% shrunk Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Via1 ROM Compiler is a SRAM IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub.
How should engineers evaluate this SRAM?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this SRAM IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.