Vendor: Synopsys, Inc. Category: GPIO

IO I3C 3.3V in GF (22nm)

Synopsys I3C I/O library supports a simplified system of connecting and managing multiple sensors in a device.

GlobalFoundries 22nm FDX Available on request View all specifications

Overview

Synopsys I3C I/O library supports a simplified system of connecting and managing multiple sensors in a device. Multiple sensor secondary devices can be controlled by one I3C primary device at a time. It offers backward compatibility with I2C legacy devices, is designed for high I/O voltage domains and supports low-core voltage domains. The I3C incorporates the Schmitt-Trigger function, supports I2C Legacy Fast Mode and FM+ Mode, and includes HBM and CDM ESD protection. We provide an interoperable validated I3C I/O solution with our in-house Synopsys I3C controllers. The library supports independent power sequencing with the support of a power management cell from our base libraries. The Synopsys I3C I/O specifications align with the latest JEDEC standards and support:

Push-pull (12.5 MHz) and Open drain I3C modes (1MHz)
I2C Legacy Fast Mode (400KHz) and Fm+(1MHz) Mode

Key features

  • Support Schmitt trigger
  • 50 ns filter for spike rejection
  • Automotive G1/G2 supported, ASIL-B certified
  • Silicon-validated IP
  • Interoperable validated I3C I/O solution with our in-house Synopsys I3C Controllers
  • HBM 2KV, CDM 500V(up to 7A), Latch-up +/-100 mA @ 125C
  • Designed to support multiple metal stack options
  • Support for flip-chip & wirebond packaging
  • Silicon-proven solution

Silicon Options

Foundry Node Process Maturity
GlobalFoundries 22nm FDX Available on request

Specifications

Identity

Part Number
dwc_io_in_i3c_3p3v
Vendor
Synopsys, Inc.
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Synopsys, Inc.
HQ: USA
Synopsys is a leading provider of high-quality, silicon-proven semiconductor IP solutions for SoC designs. The broad Synopsys IP portfolio includes logic libraries, embedded memories, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate IP integration, software development, and silicon bring-up, Synopsys’ IP Accelerated initiative provides architecture design expertise, pre-verified and customizable IP subsystems, hardening, and signal/power integrity analysis. Synopsys' extensive investment in IP quality, comprehensive technical support and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market.

Learn more about GPIO IP core

GPIO Solutions for CERN’s Radiation-Hardened Applications

For over a decade, Sofics has collaborated with CERN, the European Organization for Nuclear Research. Sofics has delivered advanced GPIO cells tailored for radiation-hardened applications, supporting CERN’s groundbreaking particle physics experiments.

A Generic Solution to GPIO verification

This paper provides a complete solution to the GPIO Verification for any SoC. GPIO interface is available in every ASIC. To avoid duplicate efforts and (save) time to verify the GPIO interface, we have produced this Generic GPIO verification suite. It is a UVM-based verification environment, with all the necessary subcomponents that are required to verify any GPIO design.

Ensuring reliability in Advanced IC design

To complete our task as engineers we rely on the tools we use. We collaborated with Siemens EDA solutions back in 2025 on a webinar about how we use their tools to develop our designs and layouts.

Integrating Post-Quantum Cryptography (PQC) on Arty-Z7

Post-quantum cryptography (PQC) is moving from theory to engineering reality. With NIST-standardized algorithms ML-KEM (FIPS 203) and ML-DSA (FIPS 204) now finalized, FPGA developers face a practical challenge: How to integrate these algorithms efficiently on resource-constrained hardware?

From I2C to I3C: Evolution of Two-Wire Communication in Embedded Systems

The I2C (Inter-Integrated Circuit) Bus invented in 1980 by Philips Semiconductors (NXP Semiconductors today) was a massive step forward in simplifying communications in embedded systems. It is a simple two-wire interface for synchronous, multi-master/multi-slave, single ended serial communication. Fast forward 45 years to today and it is still widely used for attaching low speed peripheral Integrated Circuits (ICs), processors and microcontrollers. But silicon today has changed...

Frequently asked questions about GPIO Pad Library IP cores

What is IO I3C 3.3V in GF (22nm)?

IO I3C 3.3V in GF (22nm) is a GPIO IP core from Synopsys, Inc. listed on Semi IP Hub. It is listed with support for globalfoundries Available on request.

How should engineers evaluate this GPIO?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GPIO IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP