Vendor: Noesis Technologies Category: Channel Coding

Highly Integrated Reed Solomon Codec

ntRSC_IESS core is a integrated solution implementing a time-domain Reed-Solomon Forward Error Correction algorithm.

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Overview

ntRSC_IESS core is a highly integrated solution implementing a time-domain Reed-Solomon Forward Error Correction algorithm. The core supports several programming features including codeword size, error threshold, number of parity bytes, reverse or forward order of the output, mode of operation (encode, decode or pass-through), shortened code support, erasures or error only decoding. Very low latency, high speed, simple interfacing and programmability make this core ideal for many applications including Intelsat IESS-308, DTV, DBS, ADSL, Satellite Communications, High performance modems and networks.

Key features

  • Polynomial compliant to Intelsat IESS-308; RTCA DO-217 AppendixF, Revision D Standard.
  • High throughput rate.
  • Fully programmable to correct from 1 to 10 error bytes or 20 erasure bytes per block.
  • Configurable odd or even number of check bytes.
  • Codeword lengths can be programmed from 3 to 255 bytes.
  • Can be configured in encode, decode or pass-through mode of operation.
  • Outputs corrected bytes or correction vectors in forward or reverse order.
  • Supports continuous or burst data transfer.
  • Supports programmable error threshold to help in determining channel performance.
  • Byte wide synchronous I/O ports with internal buffering.
  • Dedicated control pins enable non-continuous system data flow.
  • Fully synchronous design, using single clock.
  • Silicon proven in ASIC and FPGA technologies for a variety of applications.

Block Diagram

ntRSC_IESS block diagram

What’s Included?

  • Fully commented synthesizable VHDL or Verilog source code
  • or FPGA netlist.
  • VHDL or Verilog test benches and example configuration
  • files.
  • C++ model.
  • Comprehensive technical documentation.
  • Technical support.

Specifications

Identity

Part Number
ntRSC_IESS
Vendor
Noesis Technologies
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Noesis Technologies
HQ: Greece
Noesis Technologies specializes in design,development and marketing of high quality, cost effective communication IP cores and provides expert ASIC/FPGA design services in telecom DSP area. Our solutions are key components to the most sophisticated telecom systems. Backed-up by our leading-edge expertise on forward error correction, encryption and networking technology as well as on DSP algorithm development we provide robust solutions that are used to improve data quality, increase bandwidth or reduce the overall system cost of end-application.
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Frequently asked questions about Channel Coding IP cores

What is Highly Integrated Reed Solomon Codec?

Highly Integrated Reed Solomon Codec is a Channel Coding IP core from Noesis Technologies listed on Semi IP Hub.

How should engineers evaluate this Channel Coding?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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