Single Port SRAM Compiler IP, UMC 0.11um SP/AE process
Overview
UMC 0.11um SP/AE Logic process Synchronous Single Port SRAM memory compiler with 1.41um2-Bit cell.
Technical Specifications
Foundry, Node
UMC 110nm SP/AE
UMC
Pre-Silicon:
110nm
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- Single Port SRAM compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 320 k
- Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 640 k
- Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 320 k