Designed with low latency electronic trading in mind, the Enyx 40G MAC/PCS Ultra Low Latency IP core brings best-in-class network connectivity to your FPGA designs.
Geared towards minimizing time-to-market with our full RTL implementation and support, the Enyx 40G MAC/PCS ULL IP core helps you stay at the forefront of technology.
The Enyx 40G MAC/PCS ULL is available exclusively as part of an nxFramework subscription.
40G Ethernet MAC/PCS Ultra Low Latency IP core for FPGAs
Overview
Key Features
- Best-in-class latency from the wire to the user’s own logic. 55 ns RTT — SOP to SOF @ 322 MHz on Xilinx Virtex Ultrascale+
- Full RTL Enyx proprietary ultra-low latency hardware MAC and PCS implementations
- Clock running at up to 322 MHz for improved latency results
- Optional DC FIFOs on Rx and Tx datapath
- Configurable pipes to ease timing closure
- Standardized Avalon-ST packet streaming interfaces (AXI4-STREAM interface adapters also provided)
- Included with nxFramework project licence with unlimited instances per FPGA
Block Diagram
Technical Specifications
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